(Institución)
 
 

Docu-menta > Laboratorio Nacional de Fusión > Artículos del Laboratorio Nacional de Fusión >

Por favor, use este identificador para citar o enlazar este ítem: http://documenta.ciemat.es/handle/123456789/4553

Título : Real Time Plasma Disruptions Detection in JET Implemented With the ITMS Platform Using FPGA Based IDAQ
Autor : Ruiz, M.
Vega, J.
Rattá, G.A.
Barrera, E.
Murari, A.
López, J.M.
Arcas, G.
Meléndez, R.
Palabras clave : FPGA
Disruption
JET
Machine learning
Instrumentation
Nuclear fusion
Fecha de publicación : jul-2011
Editorial : IEEE Explore
Citación : Ruiz, M., Vega, J., Arcas, G., Ratta, G., Barrera, E., Murari, A., ... & Meléndez, R. (2011). Real time plasma disruptions detection in JET implemented with the ITMS platform using FPGA based IDAQ. IEEE Transactions on Nuclear Science, 58(4), 1576-1581.
Resumen : The use of FPGAs in data acquisition cards for processing purposes allows an efficient real time pattern recognition algorithm implementation. Using 13 JETs database waveforms an algorithm for detecting incoming plasma disruptions has been implemented. This algorithm is written in MATLAB using floating point representation. In this work we show the methodology used to implement the real time version of the algorithm using Intelligent Data Acquisition Cards (IDAQ), DAQ devices with Field Programmable Gate Array (FPGA) for local processing. This methodology is based on the translation of the MATLAB code to LabVIEW and the final coding of specific pieces of code in LabVIEW for FPGA in fixed point format. The whole system for evaluating the Real Time Disruption Detection (RTDD) has been implemented using the Intelligent Test and Measurement System (ITMS) platform. ITMS offers distributed data acquisition, distribution and real time processing capabilities with advanced, but easy to use, software tools that simplify application development and system setup. The RTDD implementation uses a standard PXI/PXIe architecture. Two 8 channel analog output cards play JETs database signals, two 8 channel DAQ with FPGA acquire signals and computes a feature vector based in FFT analysis. Finally the vector acquired is used by the system CPU to execute a pattern recognition algorithm to estimate an incoming disruption.
URI : http://documenta.ciemat.es/handle/123456789/4553
ISSN : 0018-9499
Aparece en las colecciones: Artículos del Laboratorio Nacional de Fusión

Ficheros en este ítem:

Fichero Descripción Tamaño Formato
FPGA.pdf1.29 MBAdobe PDFVisualizar/Abrir
View Statistics

Los ítems de Docu-menta están protegidos por una Licencia Creative Commons, con derechos reservados.

 

Información y consultas: documenta@ciemat.es | Documento legal